<aside> 💡 Trying to create a Register-based virtual machine aims to glue together large software components.

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Concept

• A Program Virtual Machine, rather than a System Virtual Machine. An abstract of program, not an operating system or processor.

  • Similar with JVM, YARV, LVM and ZendEngine, offers a managed runtime for high-level programming language.
  • Do not simulate any existing hardware (not to be a QEMU), nor simulate a operation system (not to be a Docker)

• Intended to be used both as a powerful, lightweight, embeddable program virtual machine for any program that needs one, and as a powerful but lightweight (compare with JVM or V8 engine) and efficient stand-alone program virtual machine.

• Works embedded in a host program. (Frequently, this host is the stand-alone program.) The host program can invoke functions to execute a piece of TVM byte-code, can write and read TVM statements, and can register C functions to be called by TVM byte-code. Through the use of C functions, TVM can be augmented to cope with a wide range of different domains, thus creating customized programming languages sharing a syntactical framework. Request host program to registe native interface to TVM. TVM will not tring to load the native interface itself. (No require method in TVM, but the host program can implement it as a native interface)

• Optimise for program execution speed. Encourage the implementation of hardware-independent algorithms within virtual machines.

• Compare with other language and its VMs

  	Lua	Ruby (yarv)	Java(Hotspot)	JS(v8)	Tapioca VM
  Standalone	✅	✅	✅	❌ (available as node.js)	✅
  Embedded	✅	❌	❌	✅	✅
  Unified ByteCode	❌	❌	✅	❌ (unified in ECMAScript)	✅
  Multi-language	❌ (Lua only)	❌	✅	✅	✅
  Lightweight	✅	❌	❌	❌	❌
  Efficient	❌ (Bytecode)	✅ (JIT)	✅ (JIT)	✅ (JIT)	✅ (AOT)

Design

• Register based program virtual machine
• 4 bytes instruction
  • 8 bit for operator and remain 24 bits for extra data
  • Can be compiled to native instructions easily.
• ByteCode using the TBON format (?)
  • ByteCode Example
• Design 1 (Register-type binded)
• Design 2 (Instruction-type binded)

Design (confirmed)

• 4 bytes instructions
  • Only 64 bit integer and float number arithmetic operator is available
  • Other data can be operated by data transform operator.